Electronics Research Laboratory
Dept. of Microelectronics

MSc Gao

PhD student
Electronic Circuits and Architectures (ELCA), Department of Microelectronics

Themes: RF electronics

Biography

Zhong Gao is a Ph.D. candidate researcher at Delft University of Technology (TU Delft), since Jan. 2019. He received the BSc degree from Shandong University, Jinan, China, in 2011 and MSc degree from University of Chinese Academy of Science, Beijing, China, in 2014. Before joining TU Delft, he worked on wireless transceiver design in Altobeam Inc., Beijing, China.

Publications

  1. A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit
    Gao, Zhong; He, Jingchu; Fritz, Martin; Gong, Jiang; Shen, Yiyu; Zong, Zhirui; Chen, Peng; Spalink, Gerd; Eitel, Ben; Alavi, Morteza S.; Staszewski, Robert Bogdan; Babaie, Masoud;
    IEEE Journal of Solid-State Circuits,
    pp. 1-20, 2022. DOI: 10.1109/JSSC.2022.3209338

  2. A 2.6-to-4.1GHz Fractional-N Digital PLL Based on a Time-Mode Arithmetic Unit Achieving -249.4dB FoM and -59dBc Fractional Spurs
    Gao, Zhong; He, Jingchu; Fritz, Martin; Gong, Jiang; Shen, Yiyu; Zong, Zhirui; Chen, Peng; Spalink, Gerd; Eitel, Ben; Yamamoto, Ken; Staszewski, Robert Bogdan; Alavi, Morteza S.; Babaie, Masoud;
    In 2022 IEEE International Solid- State Circuits Conference (ISSCC),
    pp. 380-382, 2022. DOI: 10.1109/ISSCC42614.2022.9731561

  3. A DPLL-Based Phase Modulator Achieving -46dB EVM with A Fast Two-Step DCO Nonlinearity Calibration and Non-Uniform Clock Compensation
    Gao, Zhong; Fritz, Martin; He, Jingchu; Spalink, Gerd; Staszewski, Robert Bogdan; Alavi, Morteza S.; Babaie, Masoud;
    In 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits,
    pp. 14-15, 2022. DOI: 10.1109/VLSITechnologyandCir46769.2022.9830398

  4. Recurrent Neural Network Control of a Hybrid Dynamic Transfemoral Prosthesis with EdgeDRNN Accelerator
    C*. Gao; R*. Gehlhar; A. D Ames; S.-C. Liu; T. Delbruck;
    In 2020 IEEE International Conference on Robotics and Automation (ICRA),
    2020. DOI: 10.1109/ICRA40945.2020.9196984

  5. A digital to time converter with fully digital calibration scheme for ultra-low power ADPLL in 40 nm CMOS
    B. Wang; Y. H. Liu; P. Harpe; J. van den Heuvel; B. Liu; H. Gao; R. B. Staszewski;
    In 2015 IEEE International Symposium on Circuits and Systems (ISCAS),
    pp. 2289-2292, May 2015.

  6. BiCMOS integrated waveguide power combiner at submillimeter-wave frequencies
    M. Alonso-delPino; D. Cavallo; H. Thippur-Shivamurthy; H. Gao; M. Spirito;
    In 2015 40th International Conference on Infrared, Millimeter, and Terahertz waves (IRMMW-THz),
    pp. 1-2, Aug 2015.

BibTeX support

Last updated: 16 Jun 2022

Zhong Gao