MSc Wu

PhD student
Electronic Circuits and Architectures (ELCA), Department of Microelectronics

Expertise: Hardware-Software Co-Design, Signal Processing

Themes: RF electronics

Biography

Ms. Yizhuo Wu was born in Shanxi, China, in 1999. She received B.Sc degree in University of Electronic and Science of China (UESTC) in 2021. She obtained her M.Sc. degree in Microelectronics at TU Delft in 2023. She is now a PhD student supervised by Dr. Chang Gao in the Lab of Efficient circuits & systems for Machine Intelligence (EMI).

Publications

  1. A 3.5-6.8GHz wide-bandwidth DTC-assisted fractional-N all-digital PLL with a MASH Sigma-Delta TDC for low in-band phase noise
    Y. Wu; M. Shahmohammadi; Y. Chen; P. Lu; R. B. Staszewski;
    In ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference,
    pp. 209-212, Sept 2016. DOI: 10.1109/ESSCIRC.2016.7598279
    Keywords: ... delta-sigma modulation;digital phase locked loops;integrated circuit noise;jitter;oscillators;phase noise;time-digital conversion;ADPLL;DTC-assisted fractional-N all-digital PLL;MASH ΔΣ TDC;digital-to-time converter;frequency 1.73 GHz to 3.38 GHz;frequency 3.5 GHz to 6.8 GHz;integrated jitter;low-in-band phase noise;power 10.7 mW;size 40 nm;wide-tuning range DCO;wide-tuning range digitally-controlled oscillator;Delays;Frequency measurement;Jitter;Multi-stage noise shaping;Phase locked loops;Phase noise;Tuning;All digital PLL;BBPD;DCO;DTC;MASH;TDC;noise shaping;wide-bandwidth;wide-tuning range.

  2. A 0.5ps 1.4mW 50MS/s Nyquist bandwidth time amplifier based two-step flash- #x0394; #x03A3; time-to-digital converter
    Y. Wu; R. B. Staszewski;
    In 2016 Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP),
    pp. 1-4, June 2016. DOI: 10.1109/EBCCSP.2016.7605282
    Keywords: ... CMOS digital integrated circuits;amplifiers;delta-sigma modulation;nanoelectronics;time-digital conversion;CMOS;Nyquist bandwidth time amplifier;current 1.3 mA;integrated TDC error;power 1.4 mW;shaped quantization noise;size 40 nm;time 0.5 ps;two-step flash-ΔΣ time-to-digital converter;voltage 1.1 V;Adders;Bandwidth;Calibration;Delays;Multi-stage noise shaping;Quantization (signal);Time-domain analysis;MASH;Noise shaping;TDC;error feedback;time amplifier;time domain register;time-interleaved;two-step.

  3. A 103fsrms 1.32mW 50MS/s 1.25MHz bandwidth two-step flash- #x0394; #x03A3; time-to-digital converter for ADPLL
    Y. Wu; P. Lu; R. B. Staszewski;
    In 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
    pp. 95-98, May 2015.

  4. A 56.4-to-63.4 GHz Multi-Rate All-Digital Fractional-N PLL for FMCW Radar Applications in 65 nm CMOS
    W. Wu; R. B. Staszewski; J. R. Long;
    IEEE Journal of Solid-State Circuits,
    Volume 49, Issue 5, pp. 1081-1096, May 2014.

  5. Design for test of a mm-Wave ADPLL-based transmitter
    W. Wu; R. B. Staszewski; J. R. Long;
    In Proceedings of the IEEE 2014 Custom Integrated Circuits Conference,
    pp. 1-8, Sept 2014.

  6. High-Resolution Millimeter-Wave Digitally Controlled Oscillators With Reconfigurable Passive Resonators
    W. Wu; J. R. Long; R. B. Staszewski;
    IEEE Journal of Solid-State Circuits,
    Volume 48, Issue 11, pp. 2785-2794, Nov 2013.

  7. A mm-Wave FMCW radar transmitter based on a multirate ADPLL
    W. Wu; X. Bai; R. B. Staszewski; J. R. Long;
    In 2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
    pp. 107-110, June 2013.

  8. A 56.4-to-63.4GHz spurious-free all-digital fractional-N PLL in 65nm CMOS
    W. Wu; X. Bai; R. B. Staszewski; J. R. Long;
    In 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers,
    pp. 352-353, Feb 2013.

  9. Millimeter-Wave Digitally-Assisted Frequency Synthesizer in CMOS
    W. Wu;
    PhD thesis, Delft University of Technology, 09 2013. Promotor: R.B. Staszewski and J.R. Long.

  10. Millimeter-Wave Digitally-Assisted Frequency Synthesizer in CMOS
    W. Wu;
    PhD thesis, Delft University of Technology, http://doi.org/10.4233/uuid:fffc705a-ed90-4228-bd12-b6daa8cc13a2, 09 2013. Promotor: R.B. Staszewski and J.R. Long.

  11. Passive Circuit Technologies for mm-Wave Wireless Systems on Silicon
    J. R. Long; Y. Zhao; W. Wu; M. Spirito; L. Vera; E. Gordon;
    IEEE Transactions on Circuits and Systems I: Regular Papers,
    Volume 59, Issue 8, pp. 1680-1693, Aug 2012.

  12. High-resolution 60-GHz DCOs with reconfigurable distributed metal capacitors in passive resonators
    W. Wu; J. R. Long; R. B. Staszewski; J. J. Pekarik;
    In 2012 IEEE Radio Frequency Integrated Circuits Symposium,
    pp. 91-94, June 2012.

  13. Circuit technologies for mm-wave wireless systems on silicon
    J. R. Long; Y. Zhao; Y. Jin; W. Wu; M. Spirito;
    In 2011 IEEE Custom Integrated Circuits Conference (CICC),
    pp. 1-8, Sept 2011.

  14. A new extraction technique for the series resistances of semiconductor devices based on the intrinsic properties of bias-dependent y-parameters [bipolar transistor examples]
    Cuoco, V.; Neo, W.C.E.; de Vreede, L.C.N.; de Graaff, H.C.; Nanver, L.K.; Buisman, K.; Wu, H.C.; Jos, H.F.F.; Burghartz, J.N.;
    In Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting,
    pp. 148-151, 2004. DOI: 10.1109/BIPOL.2004.1365766

BibTeX support

Last updated: 1 Sep 2023

Yizhuo Wu